// Copyright (C) 1953-2022 NUDT
// Verilog module name - stream_filter_and_policing
// Version: V4.0.0.20220526
// Created:
//         by - fenglin 
////////////////////////////////////////////////////////////////////////////
// Description:
//         
///////////////////////////////////////////////////////////////////////////

`timescale 1ns/1ps

module stream_filter_and_policing
#(
	parameter PORT_NUM = 5, // 4 gmac+ 0 xgmac+ 1 hcp
    parameter clk_period = {8'd8,41'h0}//8ns
)

(       
        i_clk                           ,  
        i_rst_n                         ,
                                        
        iv_addr                         ,         
        iv_wdata                        ,         
        i_wr_trl                        ,      
        i_rd_trl                        ,                                    
        o_wr_trl                        ,      
        ov_addr_trl                     ,      
        ov_rdata_trl                    ,

        i_wr_rwc                        ,      
        i_rd_rwc                        ,                                    
        o_wr_rwc                        ,      
        ov_addr_rwc                     ,      
        ov_rdata_rwc                    ,
        
        i_st_rxenable                   ,                                   
        i_cyclestart                      ,
        iv_time_slot_length             ,
        iv_schedule_period              ,
                        
        iv_desp                         ,
		i_desp_wr                       ,      
     
        ov_pkt_bufid                 ,
        ov_priority                  ,
  //      ov_flowid                ,
        o_desp_wr                    ,
                            
        ov_pkt_bufid_hcp                        ,
        ov_priority_hcp                     ,
        ov_inport_hcp                       ,
        o_desp_wr_hcp                 ,
        
        ov_bufid                    ,
        o_bufid_wr                  ,
        i_bufid_ack                 
      
);
// I/O
// clk & rst
input                   i_clk                 ;
input                   i_rst_n               ; 
                                              
input       [18:0]      iv_addr               ;                         
input       [31:0]      iv_wdata              ;                        
input                   i_wr_trl              ;         
input                   i_rd_trl              ;         
output                  o_wr_trl              ;
output     [18:0]       ov_addr_trl           ;
output     [31:0]       ov_rdata_trl          ;

input                   i_wr_rwc              ;         
input                   i_rd_rwc              ;         
output                  o_wr_rwc              ;
output     [18:0]       ov_addr_rwc           ;
output     [31:0]       ov_rdata_rwc          ;

input                   i_st_rxenable         ;
input                   i_cyclestart            ;
input      [10:0]       iv_schedule_period    ;      
input      [10:0]       iv_time_slot_length   ; 
// pkt_bufid and pkt_type and outport from lookup_table
input      [87:0]       iv_desp;
input                   i_desp_wr; 
//port0                                                           
output      [9*PORT_NUM-1:0]       ov_pkt_bufid     ;   
output      [3*PORT_NUM-1:0]       ov_priority      ;          
//output      [14*32-1:0]      ov_flowid    ;
output      [1*PORT_NUM-1:0]        o_desp_wr        ; 
                                            
output     [8:0]        ov_pkt_bufid_hcp        ;   
output     [2:0]        ov_priority_hcp     ;     
output     [5:0]        ov_inport_hcp       ;
output                  o_desp_wr_hcp ;  

output     [8:0]        ov_bufid        ;
output                  o_bufid_wr      ;
input                   i_bufid_ack     ; 

wire       [87:0]       wv_desp_trl2idc                  ;  
wire                    w_desp_wr_trl2idc                ; 
traffic_rate_limit 
#(
.clk_period(clk_period)
)
traffic_rate_limit_inst(
.i_clk                (i_clk                   ),  
.i_rst_n              (i_rst_n                 ),
                                               
.iv_addr              (iv_addr                 ),         
.iv_wdata             (iv_wdata                ),         
.i_wr                 (i_wr_trl                ),      
.i_rd                 (i_rd_trl                ),                                    
.o_wr                 (o_wr_trl                ),      
.ov_addr              (ov_addr_trl             ),      
.ov_rdata             (ov_rdata_trl            ),          
                                               
.iv_desp              (iv_desp                 ),
.i_desp_wr            (i_desp_wr               ),                                   
.ov_desp              (wv_desp_trl2idc         ),
.o_desp_wr            (w_desp_wr_trl2idc       ) 
); 

receive_window_check receive_window_check_inst(
.i_clk                       (i_clk                            ),
.i_rst_n                     (i_rst_n                          ),

.iv_addr                     (iv_addr                          ),         
.iv_wdata                    (iv_wdata                         ),         
.i_wr                        (i_wr_rwc                         ),      
.i_rd                        (i_rd_rwc                         ),                                            
.o_wr                        (o_wr_rwc                         ),      
.ov_addr                     (ov_addr_rwc                      ),      
.ov_rdata                    (ov_rdata_rwc                     ),

.i_st_rxenable               (i_st_rxenable                    ), 
.i_cyclestart               (i_cyclestart                    ),     
.iv_time_slot_length         (iv_time_slot_length              ),
.iv_schedule_period          (iv_schedule_period               ),

.iv_desp                     (wv_desp_trl2idc                  ),
.i_desp_wr                   (w_desp_wr_trl2idc                ),
   
.ov_priority_p0            (ov_priority [0*3+:3]  ),  
.ov_bufid_p0               (ov_pkt_bufid[0*9+:9]  ),
.ov_flowid_p0              (),//ov_flowid   [0*14+:14]), 
.o_descriptor_wr_p0        (o_desp_wr   [0]       ), 
                                                     
.ov_priority_p1            (ov_priority [1*3+:3]  ),  
.ov_bufid_p1               (ov_pkt_bufid[1*9+:9]  ),
.ov_flowid_p1              (),//ov_flowid   [1*14+:14]), 
.o_descriptor_wr_p1        (o_desp_wr   [1]       ), 
                                                     
.ov_priority_p2            (ov_priority [2*3+:3]  ),  
.ov_bufid_p2               (ov_pkt_bufid[2*9+:9]  ),
.ov_flowid_p2              (),//ov_flowid   [2*14+:14]), 
.o_descriptor_wr_p2        (o_desp_wr   [2]       ), 
                                                     
.ov_priority_p3            (ov_priority [3*3+:3]  ),  
.ov_bufid_p3               (ov_pkt_bufid[3*9+:9]  ),
.ov_flowid_p3              (),//ov_flowid   [3*14+:14]), 
.o_descriptor_wr_p3        (o_desp_wr   [3]       ), 
                                                     
//.ov_priority_p4            (ov_priority [4*3+:3]  ),  
//.ov_bufid_p4               (ov_pkt_bufid[4*9+:9]  ),
//.ov_flowid_p4              (),//ov_flowid   [4*14+:14]), 
//.o_descriptor_wr_p4        (o_desp_wr   [4]       ), 
//                                                     
//.ov_priority_p5            (ov_priority [5*3+:3]  ),  
//.ov_bufid_p5               (ov_pkt_bufid[5*9+:9]  ),
//.ov_flowid_p5              (),//ov_flowid   [5*14+:14]), 
//.o_descriptor_wr_p5        (o_desp_wr   [5]       ), 
//                                                     
//.ov_priority_p6            (ov_priority [6*3+:3]  ),  
//.ov_bufid_p6               (ov_pkt_bufid[6*9+:9]  ),
//.ov_flowid_p6              (),//ov_flowid   [6*14+:14]), 
//.o_descriptor_wr_p6        (o_desp_wr   [6]       ), 
//                                                     
//.ov_priority_p7            (ov_priority [7*3+:3]  ),  
//.ov_bufid_p7               (ov_pkt_bufid[7*9+:9]  ),
//.ov_flowid_p7              (),//ov_flowid   [7*14+:14]), 
//.o_descriptor_wr_p7        (o_desp_wr   [7]       ), 
//                                                     
//.ov_priority_p8            (ov_priority [8*3+:3]  ),  
//.ov_bufid_p8               (ov_pkt_bufid[8*9+:9]  ),
//.ov_inport_p8              (),//ov_flowid   [8*14+:14]), 
//.o_descriptor_wr_p8        (o_desp_wr   [8]       ), 
//                                                     
//.ov_priority_p9            (ov_priority [9*3+:3]  ),  
//.ov_bufid_p9               (ov_pkt_bufid[9*9+:9]  ), 
//.ov_inport_p9              (),//ov_flowid   [9*14+:14]),  
//.o_descriptor_wr_p9        (o_desp_wr   [9]       ),  
//                                                      
//.ov_priority_p10           (ov_priority [10*3+:3]  ),  
//.ov_bufid_p10              (ov_pkt_bufid[10*9+:9]  ),
//.ov_inport_p10             (),//ov_flowid   [10*14+:14]), 
//.o_descriptor_wr_p10       (o_desp_wr   [10]       ), 
//                                                      
//.ov_priority_p11           (ov_priority [11*3+:3]  ),  
//.ov_bufid_p11              (ov_pkt_bufid[11*9+:9]  ),
//.ov_inport_p11             (),//ov_flowid   [11*14+:14]), 
//.o_descriptor_wr_p11       (o_desp_wr   [11]       ), 
//                                                      
//.ov_priority_p12           (ov_priority [12*3+:3]  ),  
//.ov_bufid_p12              (ov_pkt_bufid[12*9+:9]  ),
//.ov_inport_p12             (),//ov_flowid   [12*14+:14]), 
//.o_descriptor_wr_p12       (o_desp_wr   [12]       ), 
//                                                      
//.ov_priority_p13           (ov_priority [13*3+:3]  ),  
//.ov_bufid_p13              (ov_pkt_bufid[13*9+:9]  ),
//.ov_inport_p13             (),//ov_flowid   [13*14+:14]), 
//.o_descriptor_wr_p13       (o_desp_wr   [13]       ), 
//                                                      
//.ov_priority_p14           (ov_priority [14*3+:3]  ),  
//.ov_bufid_p14              (ov_pkt_bufid[14*9+:9]  ),
//.ov_inport_p14             (),//ov_flowid   [14*14+:14]), 
//.o_descriptor_wr_p14       (o_desp_wr   [14]       ), 
//                                                      
//.ov_priority_p15           (ov_priority [15*3+:3]  ),  
//.ov_bufid_p15              (ov_pkt_bufid[15*9+:9]  ),
//.ov_inport_p15             (),//ov_flowid   [15*14+:14]), 
//.o_descriptor_wr_p15       (o_desp_wr   [15]       ), 
//                                                      
//.ov_priority_p16           (ov_priority [16*3+:3]  ),  
//.ov_bufid_p16              (ov_pkt_bufid[16*9+:9]  ),
//.ov_inport_p16             (),//ov_flowid   [16*14+:14]), 
//.o_descriptor_wr_p16       (o_desp_wr   [16]       ), 
//                                                      
//.ov_priority_p17           (ov_priority [17*3+:3]  ),  
//.ov_bufid_p17              (ov_pkt_bufid[17*9+:9]  ),
//.ov_inport_p17             (),//ov_flowid   [17*14+:14]), 
//.o_descriptor_wr_p17       (o_desp_wr   [17]       ), 
//                                                      
//.ov_priority_p18           (ov_priority [18*3+:3]  ),  
//.ov_bufid_p18              (ov_pkt_bufid[18*9+:9]  ),
//.ov_inport_p18             (),//ov_flowid   [18*14+:14]), 
//.o_descriptor_wr_p18       (o_desp_wr   [18]       ), 
//                                                      
//.ov_priority_p19           (ov_priority [19*3+:3]  ),  
//.ov_bufid_p19              (ov_pkt_bufid[19*9+:9]  ),
//.ov_inport_p19             (),//ov_flowid   [19*14+:14]), 
//.o_descriptor_wr_p19       (o_desp_wr   [19]       ), 
                                                      
//.ov_priority_p20           (ov_priority [20*3+:3]  ),  
//.ov_bufid_p20              (ov_pkt_bufid[20*9+:9]  ),
//.ov_inport_p20             (),//ov_flowid   [20*14+:14]), 
//.o_descriptor_wr_p20       (o_desp_wr   [20]       ), 
//                             
//.ov_priority_p21           (ov_priority [21*3+:3]  ),
//.ov_bufid_p21              (ov_pkt_bufid[21*9+:9]  ),
//.ov_inport_p21             (),//ov_flowid   [21*14+:14]),
//.o_descriptor_wr_p21       (o_desp_wr   [21]       ),
//                                                    
//.ov_priority_p22           (ov_priority [22*3+:3]  ),
//.ov_bufid_p22              (ov_pkt_bufid[22*9+:9]  ),
//.ov_inport_p22             (),//ov_flowid   [22*14+:14]),
//.o_descriptor_wr_p22       (o_desp_wr   [22]       ),
//                                                    
//.ov_priority_p23           (ov_priority [23*3+:3]  ),
//.ov_bufid_p23              (ov_pkt_bufid[23*9+:9]  ),
//.ov_inport_p23             (),//ov_flowid   [23*14+:14]),
//.o_descriptor_wr_p23       (o_desp_wr   [23]       ),
//                                                    
//.ov_priority_p24           (ov_priority [24*3+:3]  ),
//.ov_bufid_p24              (ov_pkt_bufid[24*9+:9]  ),
//.ov_inport_p24             (),//ov_flowid   [24*14+:14]),
//.o_descriptor_wr_p24       (o_desp_wr   [24]       ),
//                                                    
//.ov_priority_p25           (ov_priority [25*3+:3]  ),
//.ov_bufid_p25              (ov_pkt_bufid[25*9+:9]  ),
//.ov_inport_p25             (),//ov_flowid   [25*14+:14]),
//.o_descriptor_wr_p25       (o_desp_wr   [25]       ),
//                                                    
//.ov_priority_p26           (ov_priority [26*3+:3]  ),
//.ov_bufid_p26              (ov_pkt_bufid[26*9+:9]  ),
//.ov_inport_p26             (),//ov_flowid   [26*14+:14]),
//.o_descriptor_wr_p26       (o_desp_wr   [26]       ),
//                                                    
//.ov_priority_p27           (ov_priority [27*3+:3]  ),
//.ov_bufid_p27              (ov_pkt_bufid[27*9+:9]  ),
//.ov_inport_p27             (),//ov_flowid   [27*14+:14]),
//.o_descriptor_wr_p27       (o_desp_wr   [27]       ),
//                                                    
//.ov_priority_p28           (ov_priority [28*3+:3]  ),
//.ov_bufid_p28              (ov_pkt_bufid[28*9+:9]  ),
//.ov_inport_p28             (),//ov_flowid   [28*14+:14]),
//.o_descriptor_wr_p28       (o_desp_wr   [28]       ),
//                                                    
//.ov_priority_p29           (ov_priority [29*3+:3]  ),
//.ov_bufid_p29              (ov_pkt_bufid[29*9+:9]  ),
//.ov_inport_p29             (),//ov_flowid   [29*14+:14]),
//.o_descriptor_wr_p29       (o_desp_wr   [29]       ),
//                                                     
//.ov_priority_p30           (ov_priority [30*3+:3]  ),
//.ov_bufid_p30              (ov_pkt_bufid[30*9+:9]  ),
//.ov_inport_p30             (),//ov_flowid   [30*14+:14]),
//.o_descriptor_wr_p30       (o_desp_wr   [30]       ),
//                           
//.ov_priority_p31           (ov_priority [31*3+:3]  ),
//.ov_bufid_p31              (ov_pkt_bufid[31*9+:9]  ),
//.ov_inport_p31             (),//ov_flowid   [31*12+:12]),
//.o_descriptor_wr_p31       (o_desp_wr   [31]       ),
                           
.ov_priority_p32           (ov_priority_hcp     ) ,//transmit to hcp.
.ov_bufid_p32              (ov_pkt_bufid_hcp        ) ,
.ov_inport_p32             (ov_inport_hcp       ) ,
.o_descriptor_wr_p32       (o_desp_wr_hcp       ) ,

.ov_bufid                    (ov_bufid                   ),
.o_bufid_wr                  (o_bufid_wr                 ),
.i_bufid_ack                 (i_bufid_ack                )
);
//reg   [31:0] rv_p0_desp_tx_cnt ;
//reg   [31:0] rv_p1_desp_tx_cnt ;
//reg   [31:0] rv_p2_desp_tx_cnt ;
//reg   [31:0] rv_p3_desp_tx_cnt ;
//reg   [31:0] rv_p32_desp_tx_cnt;
//always @(posedge i_clk or negedge i_rst_n) begin
//    if(i_rst_n == 1'b0)begin
//        rv_p0_desp_tx_cnt <= 32'b0;
//        rv_p1_desp_tx_cnt <= 32'b0;
//        rv_p2_desp_tx_cnt <= 32'b0;
//        rv_p3_desp_tx_cnt <= 32'b0;
//        rv_p32_desp_tx_cnt<= 32'b0;
//    end
//    else begin 
//        if(o_desp_wr_p0)begin
//            rv_p0_desp_tx_cnt <= rv_p0_desp_tx_cnt + 1'b1;
//        end
//        else begin
//            rv_p0_desp_tx_cnt <= rv_p0_desp_tx_cnt;
//        end
//        
//        if(o_desp_wr_p1)begin
//            rv_p1_desp_tx_cnt <= rv_p1_desp_tx_cnt + 1'b1;
//        end
//        else begin
//            rv_p1_desp_tx_cnt <= rv_p1_desp_tx_cnt;
//        end
//        
//        if(o_desp_wr_p2)begin
//            rv_p2_desp_tx_cnt <= rv_p2_desp_tx_cnt + 1'b1;
//        end
//        else begin
//            rv_p2_desp_tx_cnt <= rv_p2_desp_tx_cnt;
//        end
//
//        if(o_desp_wr_p3)begin
//            rv_p3_desp_tx_cnt <= rv_p3_desp_tx_cnt + 1'b1;
//        end
//        else begin
//            rv_p3_desp_tx_cnt <= rv_p3_desp_tx_cnt;
//        end
//        
//        if(o_desp_wr_hcp)begin
//            rv_p32_desp_tx_cnt <= rv_p32_desp_tx_cnt + 1'b1;
//        end
//        else begin
//            rv_p32_desp_tx_cnt <= rv_p32_desp_tx_cnt;
//        end             
//    end
//end 
endmodule
